/*
 Combinational UDP test.
*/

module top ;

 wire [1:0] w1;
 reg [1:0] r1, r2;

 xand x1 [1:0] (w1, r1, r2);

 initial begin
  $display ("r1\tr2\tw1\n----------------------------\n");
  $strobe  ("%b\t%b\t%b", r1, r2, w1);
  r1 = 'b10;
  r2 = 'b10;
  #1;
  r2 = 1;
  #1;
  r1 = 0;
  r2 = 1;
  #1;
  r1 = 1;
  #1;
  r1 = 1'bX;
  r2 = 'bZ0;
  #1;
 end //initial
endmodule

primitive xand(out, in1, in2);
output out;
input in1, in2;
table
  //in1 in2 out
     0   0 : 0;
     0   1 : 0;
     1   0 : 0;
     1   1 : 1;
endtable
endprimitive
